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TI PUSHES FERROELECTRIC RAM FORWARD IN MEMORY RACE
By Peter Clarke

Texas Instruments Inc is jumping into the next-generation universal memory fray with hard-hitting support for ferroelectric RAM, heralding its suitability as a replacement for embedded flash and embedded DRAM. Company researchers are due to discuss a 64-Mbit FRAM built in 130-nanometer process technology at the upcoming International Electron Device Meeting (December 8 to 11, San Francisco).

Texas Instruments (TI) is pushing ahead with ferroelectric memory as other leading chipmakers, such as Motorola, Philips, Infineon, and IBM are lining up behind magnetic RAM (MRAM). Intel, the world's largest chipmaker, is known to be researching non-volatile phase-change and plastic memory technologies.

TI is driven by its desire to create near single-chip client-side cellular telephones with large amounts of on-chip memory. But the latest developments,are still in the research domain and in preparation for a commercial deployment in a couple of years time.

"We would like to be in production [with embedded ferroelectric RAM] in 2005 on 90-nanometer process technology," Dennis Buss, vice president of R&D and manufacturing at Texas Instruments, told SBN. "The fact that we are demonstrating on a standard 130-nm flow makes that readily achievable."

"The industry is in a race to see which memory technology will succeed -- ferroelectric, MRAM, or Ovonic --- as the low-power, high-density, non-volatile embedded memory," said Buss. Ovonic refers to a phase-change memory being proposed by Ovonyx Inc and investigated by Intel.

"We've chosen ferroelectric for two reasons; it takes just two additional masks and the maturity of the technology. Fujitsu has already shipped 100-million units of stand-alone FRAM. So we know manufacturing problems can be solved," said Buss.

But whereas established vendors of FRAM devices have tended to implement stand-alone memories on conservative process technologies at IEDM TI's researchers are due to discuss a 64-Mbit ferrolectric RAM built within a standard CMOS 130-nanometer process technology. This move to leading-edge process technology marks a major step-forward for FRAM technology in its race against MRAM and the phase-change memory technologies, Buss said.

Although FRAM technology has been around for at least a couple of decades, pioneered by Ramtron International Corp, TI is one of the first companies to apply the technology to a leading edge process technology and show it off at high density. Texas entered into a multi-million dollar FRAM memory licensing and development agreement with Ramtron in August 2001.

"We have no intention of re-entering the memory business," said Buss, emphasizing that the 64-Mbit chip is intended as a demonstrator of the technology's capability.

Ferroelectric RAM has a single-transistor, single-capacitor (1T-1C) structure, similar to a DRAM but with a layer of electrically polarizable material as the storage element and providing the advantage of non-volatile storage. This means that memory cells can be much smaller than flash memory cells and static RAM cells.

Embedded DRAM, which could compete on density but is volatile, also has problems when it comes to cost-effective manufacture, Buss said.

"It's very simple economics. A DSP needs six layers of metal and 26 masks, DRAM needs, say three layers of metal and 26 or 28 masks. The trouble is they are not the same masks and to do the two together you need 32 masks or more. It always comes out unfavorable to embedded manufacture because of the number of layers."

Buss continued: "Ferroelectric memory only requires two additional masks which, given its other characteristics, makes it very attractive." Buss said that in large memory arrays access time was governed by the length and capacitance of the word lines not by underlying materials properties, so he expected access times for FRAM arrays to come out about the same as their DRAM equivalents.

"We believe FRAM has the potential to become an ideal non-volatile memory option for a wide range of applications in the 2005 timeframe," said Hans Stork, senior vice president and director of TI's silicon technology development. "This demonstrates that semiconductor materials research coupled with innovative product design can deliver revolutionary advances, and TI believes FRAM can change the product dynamics in embedded memory."

The 1.5-volt chips demonstrate the smallest FRAM cells shown-to-date, measuring only 0.54 square micron, TI claimed. At the 90-nm process node, the generation where TI's first embedded FRAM products are expected to appear, the FRAM cells should be 0.35 square microns, the company said.

The ferroelectric capacitor is formed using iridium electrodes and a thin Lead Zirconate Titanate (PZT) ferroelectric layer where the electric polarization is shifted between two stable states by the application of an electric field. The direction of this electric polarization is sensed by internal circuits as either a high or a low logic state. Each orientation is stable and remains in place even after the electric field is removed, preserving the data within the memory without periodic refresh.

Ramtron and TI have worked together on the production of the 64-Mbit FRAM device. While TI is interested in embedded applications Ramtron will focus its use of the jointly developed technology on stand-alone memory products, TI said.

Buss said that despite success with the production of a 64-Mbit FRAM device a great deal of work still needed to be done characterizing manufacturing processes to maximize yield and this explained why 2005 was likely to be the earliest the technology could be brought to market.