Features - Storage Innovations:

TOSHIBA DEVELOPS NEW 5- AND 6-CHIP PACKAGES

Continuing its industry leadership in innovative packaging solutions, Toshiba America Electronic Components Inc (TAEC) has announced new multi-chip package (MCP) products which have five and six chips stacked inside ball grid array (BGA) packages to create single 9mm x 12mm x 1.6mm components. Toshiba Corp (Toshiba) will develop five and six-chip MCPs with various combinations of NOR flash, NAND flash, Static RAM (SRAM), and Pseudo SRAM (PSRAM) to meet the complex memory requirements of digital camera phones and feature-rich 3G cell phones.

As additional features and applications have been added to cellular telephones, such as Internet browsing, text messaging, games, and digital camera functionality, memory requirements for these feature-rich phones have become increasingly complex. Tradeoffs in density, speed, cost and power make combinations of several different types of memory desirable in cell phones. For example, cell phone designers typically prefer NOR flash memory for code storage; low-power SRAM or fast, cost-effective PSRAM for working memory, and are now turning to NAND flash for additional application and data storage because of its low cost-per-bit. Toshiba's new five- and six-chip stacks can provide a combination of three or four types of memory in densities targeted to meet the needs of emerging feature-rich phones.

"These new MCPs can provide a complete, versatile memory subsystem with multiple types of high density memories in the space of a single component, helping to address the design challenge to provide higher density, higher performance memory, at a lower cost and in a smaller space," said Scott Nelson, director of business development, Flash Memory Business Unit, for TAEC. "For high-volume applications, Toshiba will offer custom configurations that combine various combinations of five or six NOR flash, SRAM, PSRAM and NAND flash die. In addition, we will continue to offering existing MCP products which have two, three and four stacked chips."

A broad selection of Toshiba's NOR flash, NAND flash, low-power SRAM and PSRAM is available for multi-die MCP configurations, as summarized below. Additional technical detail is available on TAEC's Web site at www.chips.toshiba.com.

Specific combinations of five or six die for high volume applications of interest will be reviewed by Toshiba for technical feasibility.

The NAND flash available for Toshiba's five- and six-chip MCPs is a modified NAND flash memory called "Chip Enable Don't Care" NAND flash that can be more easily combined in cell phones with other memory such as NOR flash, SRAM and Pseudo SRAM to provide a simpler, more affordable alternative to meet the increased memory requirements of today's feature-rich phones.

Pricing and Availability

For pricing and availability of specific MCP configurations with five- or six-stacked die, please contact Tech.Questions@taec.toshiba.com .