Features - Storage Innovations:

CYPRESS SAMPLES 18-MBIT FAMILIES OF NEW SRAMs

Cypress Semiconductor Corporation, an industry leader in SRAMs and co-founder of the industry's QDR Co-Development Team, has begun sampling new families of 18-Mbit QDR, QDR-II, DDR and DDR-II memory devices.

Available in 24 configurations, Cypress's new 18-Mbit QDR/DDR SRAMs increase system-level bandwidth and accelerate read/write capabilities in a variety of data-intensive applications, including network switches and routers, Fibre Channel and iSCSI storage switches and host bus adapters, low-end servers and semiconductor test equipment. After releasing two 9-Mbit products in 2001, this is Cypress's second family of QDR products. The company will introduce 36-Mbit and 72-Mbit product families in early 2004.

"Cypress's new QDR, QDR-II, DDR and DDR-II SRAMs expand an already broad portfolio of high bandwidth, low latency Cypress SRAMs that are being used by many of the world's leading networking and storage firms," said Antonio Alvarez, senior vice president of the Memory Products Division at Cypress Semiconductor. "With the advent of our 18-Mbit devices, we're delivering a simple migration path to even greater levels of performance, critical to our customers' success."

The QDR Co-Development Team, comprised of Cypress, IDT, NEC, Renesas, Samsung, and formerly Micron, has jointly developed specifications for the QDR, QDR-II, DDR and DDR-II SRAM architectures. Together, they offer their customers pin-compatible products from multiple world-class suppliers who utilize internally owned fabrication plants and technologies. Micron was the first Co-Development Partner to introduce an 18-Mbit QDR/DDR product, but the company recently exited the SRAM market. Cypress's 18-Mbit product offering will offer its customers a 100 percent compatible alternate source.

Cypress's new 18-Mbit devices operate at clock frequencies up to 250 MHz and provide up to 36 Gbps of bandwidth to increase network capacity. The products' low initial latency -- 1.5 cycles for QDR-II and DDR-II and one cycle for QDR and DDR -- maximizes the efficiency of algorithmic look-up tables, statistics tracking and data buffering. In addition, the devices' 165 fBGA package is 40 percent smaller than alternative solutions. All of the new products are fully compatible with those of the other suppliers in the QDR Co-Development Team.

Cypress's QDR (Quad Data Rate) and QDR-II memories increase bandwidth by supporting separate data inputs and outputs for simultaneous read and write operations. Independent ports transferring data with a double data rate interface results in a 4X improvement in data throughput versus comparable synchronous SRAMs. This provides maximum data throughput, minimal initial latency, and the elimination of data "turn-around" on the data bus, which is required in common I/O devices. Cypress's DDR (Double Data Rate) and DDR-II architectures have the same double data rate interface as QDR and QDR-II with a common I/O structure for applications that are heavily read oriented or that have ASICs or FPGAs with pin limitations. In these applications, the DDR and DDR-II architectures offer twice the data bandwidth as traditional synchronous SRAMs with minimal initial latency.

Availability

Cypress's 18-Mbit QDR, QDR-II, DDR and DDR-II devices are available in 24 configurations. The company is shipping samples of its CY7C1313V18 and CY7C1305V25 devices now, which will be in full production this Fall, and will begin sampling other SRAM configurations in August. For more information, visit Cypress's online at www.cypress.com.