The Legend Continues...

At SRC Computers, we give you Silicon Valley technical excitement with Colorado Springs quality of life! SRC Computers, Inc. is a privately owned start-up company that possesses an entrepreneurial spirit and small-company atmosphere where employees are encouraged to demonstrate initiative and action. Founded in 1996 by the legendary supercomputer pioneer, Seymour Cray, we have followed his vision to develop the best high performance scientific and engineering computers in the world. SRC's senior management team has over 135 years of experience in the high performance computing industry. At SRC, you get engineering based management, not management based engineering. SRC will be a success and you have the opportunity to not just be a part of it but to also benefit from it with our equity ownership opportunities.

Headquartered in beautiful Colorado Springs, the renowned scenery of Pikes Peak and Garden of the Gods are located right outside your door. One of the best-kept secrets of Colorado Springs is the weather. With over 300 days of sunshine each year, and moderate temperatures year round, even the snow doesn't stick around for more than a few days at a time. Colorado Springs offers activities to suit every lifestyle. The outdoor enthusiast may enjoy mountain biking, hiking, golfing, fishing, or skiing. If you're more of a spectator sports fan, you can choose from football at the Air Force Academy, professional racing events at the new Pikes Peak International Raceway, or minor league baseball with the Sky Sox. If you simply must have the major leagues, the Denver Broncos, Denver Nuggets, Colorado Avalanche, and the Colorado Rockies are a mere hour away. For those more interested in the performing arts, choose from a wide variety of community and professional events held at the Colorado Springs Performing Arts Center, the Fine Arts Center, and the World Arena.

To see more about us please visit: http://www.srccomp.com/aboutus_links.htm.

SRC Computers Inc. Job Postings

Lead Compiler Development Engineer (Job Code HPC101)

(This position is available in either Colorado Springs or the "Twin Cities")

Using data flow analysis, vectorization, and VLIW code generation techniques, you will lead the development effort for the compiler for C/C++ and FORTRAN that generates optimized hybrid code for Intel IA32/IA64 and appropriate logic configuration for FPGAs within the Multi-Adaptive Processing (MAP^TM).

You will also provide requirements for, and evaluate, new hardware features and system architectures to ensure optimum performance and supportability for new products utilizing reconfigurable processors, and collaborate with researchers and customers in the ongoing development of hardware compilers.

This position requires an MS or Ph.D. in computer science or related engineering discipline, and at least 8 years of experience writing compilers for high-performance systems, and knowledge of system hardware architecture and hardware systems. Experience with Solaris OS and Intel hardware is a plus. Prior experience with logic design tools and languages such as Verilog or VHDL is desirable.

Senior Compiler Development Engineer (Job Code HPC102)

(This position is available in either Colorado Springs or the "Twin Cities")

You will work with a team of hardware and software engineers in designing, implementing, testing and supporting the reconfigurable processor, know as MAP™ (Multi-Adaptive Processing) on SRC's high-performance computers. You will participate in the development effort for the hybrid compiler supporting MAP^TM. Using data flow analysis, vectorization, and VLIW code generation, you will develop a compiler for C/C++ and FORTRAN that generates Optimized hybrid code for Intel IA32/IA64 and appropriate logic configuration for FPGAs within the MAP^TM.

You will also work on the development of the high-level programming environment including debugger interfaces, performance tools, and run-time libraries for hybrid code generated by the compiler. Provide requirements for and evaluation of new hardware features and system architectures to ensure optimum performance and supportability for new products utilizing reconfigurable processors. Collaborate with researchers and customers in the ongoing development of hardware compilers.

Candidates for this position should have as BS degree (Masters is preferable) in computer science or a related engineering discipline, and at least 5 years of experience writing compilers for high performance systems. Knowledge of system hardware architecture and hardware systems is desirable. Experience in any of the following areas is a plus: Solaris OS, Intel hardware, Logic design tools, and Verilog, VHDL or similar languages.

Senior Operating System Development Engineer (Job Code HPC103)

(This position is available in either Colorado Springs or the "Twin Cities")

You will participate within a team of hardware and software engineers in designing, implementing, testing, and supporting new hardware and the operating system software. Develop operating system features that allow users to take advantage of the unique hardware features of SRC systems, including: Resource management (asymmetric processor scheduling, memory hierarchy management, and I/O management), fault tolerance and dynamic reconfiguration, performance evaluation and tuning, and cluster management.

Additionally, you will provide requirements for and evaluation of new hardware features and system architectures to ensure optimum performance and supportability for new products. Support hardware and software troubleshooting on new and existing systems. Participate in the bring-up process for new hardware, and develop software fixes for problems reported in the operating system.

Ideal candidates should have a BS (Masters preferred) in computer science or a related engineering discipline, and 4+ years of software development experience. Must have knowledge of UNIX operating systems kernel internals or device drivers, system hardware architecture and hardware systems debugging techniques, coursework or experience in C or assembly language programming, and UNIX/Solaris systems administration, or common UNIX scripting languages. Experience with Solaris OS, Intel hardware, and hardware/software systems integration is also desired.

Senior Applications Engineer (Job Code HPC202)

(This position is available in either Colorado Springs or the "Twin Cities")

You will work on a NEW HPC architecture that shows the potential for orders of magnitude acceleration. You will be responsible for the porting, optimization, tuning, and benchmarking of FORTRAN and C/C++ customer codes in support of SRC-6 sales opportunities.

Ideally, you will have a Masters degree in Computer Science or related scientific field, 5 years of directly related work experience. You should also be familiar with parallel programming, including threads and MPI, experienced with FORTRAN and C on UNIX systems, and experienced with code porting and optimization on SMP, distributed memory, and/or vector machines.

Product Marketing Manager/Director (Job Code HPC201)

You will be responsible for product marketing activities involving SRC's High Performance Computing technology including development and execution of the Marketing Plan. You will develop the product strategy, product message and competitive positioning, meet with early customers to test and tune the value proposition, create customer awareness and demand generation, develop pricing strategies, and product launch. You will work with the sales, software, and hardware teams from product inception through end-of-life. Responsibilities will also include monitoring product revenue and developing marketing activities required to achieve the committed revenue.

In addition to a technical undergraduate degree, an MBA is preferred. Candidates should have at least 4 years of experience in marketing HPC, UNIX, or Intel-based servers. This position also requires experience in product marketing, performing market trend analysis, planning product strategies, and strong communication and presentation skills, In addition, knowledge of the HPC, Intel, and/or UNIX server market and product is strongly desired.

Senior Simulation Engineer (Job Code HPC001)

As a member of the design team, you will perform digital functional simulations at the chip, board, and system level for verification of complex FPGA or ASIC based designs. Designs may include processors, crossbar switches, and I/O and memory subsystems. You will also develop HDL based test benches and use third party models in support of the simulations. You also may participate in the selection of third party tools.

This positions requires a BS in Electrical Engineering and 7+ years of experience in simulation, design, or design verification; and at least 3 years of experience with HDL based simulations. Experience with test bench development tools for FPGA based designs is a plus. Perl and TCl is desirable.

Senior Design Engineer (Job Code HPC003)

You will develop FPGA based circuit designs for use in a high performance multiprocessor scientific computer system. Responsible for developing new designs and updating existing designs at the board and chip levels, and validating those designs in both a lab and system environment. Standard test equipment, such as oscilloscopes and logic/bus analyzers will be used in the validation process. Design assignments may be on the processor bus bridge interface, crossbar conflict resolution circuitry, crossbar switches, memory control, or cache coherency control.

Candidates must have a BS in electrical or computer engineering, and have 5 or more years of experience designing with high-speed FPGA's. Experience with microprocessors (preferably x86), high speed switches, or memory subsystems is desirable. Experience with schematic capture design and HDL design is also a plus.

Senior Design Engineer (Job Code HPC006)

You will develop FPGA based designs as part of a new processor bridge chip interfacing to an IA64 microprocessor. Specific duties include performing the design, checkout, and integration of FPGA based designs, and developing the initial design specifications for the processor board.

This position requires a BS in electrical engineering, 7+ years of experience in digital design using schematic entry, and 5 or more years of FPGA/ASIC design experience. Candidates should also have experience in the following areas:

• HDL design;
• Design, checkout, and integration at both the chip and the board level;
• Creating design specification documentation; and
• Designing with microprocessors in multiprocessor systems (x86 preferred).

Senior Design Engineer I/O Subsystems (Job Code HPC007)

You will develop a new I/O subsystem including FPGA based designs. Specific duties include designing, checking out, and integrating the chips and boards in the I/O subsystem during the design verification process, and developing the initial design specifications for the subsystem.

This position requires a BS in electrical engineering, 7+ years of experience in digital design using schematic entry, and 5 or more years of FPGA/ASIC design experience. Candidates should also have experience in the following areas:

• HDL design;
• I/O system design;
• Design, checkout, and integration at both the chip and the board level; and
• Creating design specification documentation.

Senior Design Engineer (Job Code HPC008)

This design engineer will perform digital chip and board design of an FPGA based cross bar switch. Designs will operate in excess of 200 MHz and require the engineer to develop conflict resolution schemes in conjunction with wide high speed switches. Design will be primarily schematic capture based, and will require some hand placement and routing. Macro circuit development will also be utilized.

This position requires a BS in electrical engineering and 7+ years of experience in high-speed digital design. Some design experience above 100 MHz and with large FPGA designs is also required. Experience with Viewlogic tools and Xilinx FPGA's is a plus.

Senior System Architect (Job Code HPC105)

As the system architect, you will work with a team of hardware and software engineers to design, implement, test and support development efforts on high performance computers. Your responsibilities will be to:

• Ensure optimum performance and supportability of new products by developing requirements and evaluating new hardware features and system architectures.
• Lead the process to define new systems, and maintain the document record of architecture questions and decisions.
• Develop system models and evaluation programs to test architecture design, and provide feedback and guidance to design teams.
• Interact with customers and prospects to gather requirements and evaluate current products.
• Evaluate performance of prototype systems.

This position requires an MS or Ph.D. in computer engineering or a closely related discipline, and 10+ years of high-level architect/design experience with high performance computer systems. Demonstrated expertise in system hardware architecture and hardware systems required. Experience with Solaris OS and Intel hardware is a plus.

Senior Software Engineer (Job Code HPC106)

As a senior software engineer, you will work with a team of hardware and software engineers in designing, implementing, testing and supporting new hardware and the supporting operating system software.

You will work closely with the hardware designers and simulation engineers to verify the design of hardware on prototype systems by developing the hardware design verification plans, and the software to implement them. Other duties will include:

• Providing the requirements for and evaluating new hardware features and system architectures to support design verification features;
• Participating in the bring-up process for new hardware;
• Working with diagnostic engineers to utilize design verification logic in support of diagnostic needs.

Candidates should have a BS in computer science or electrical engineering, at least 4 years of diagnostic or design verification experience, and be able to program in C and assembly. Candidates should also have experience with diagnostic or design verification techniques, have worked with Intel IA32/IA64 chip sets, and have knowledge of system hardware architecture and hardware systems debugging techniques.

Senior Software Engineer - BIOS (Job Code HPC107)

These software engineers will work with a team of hardware and software engineers in designing, implementing, testing and supporting new hardware and the supporting system software.

Specific duties will include:

• Developing required features in BIOS or the low level hardware administrative layer of the current and future systems;
• Working closely with the hardware designers, OS developers, and diagnostic programmers to provide support during new system initialization;
• Providing the requirements for and evaluating new hardware features and system architectures to ensure optimum performance and supportability for new products;
• Supporting the hardware and software troubleshooting for new and existing systems;
• Participating in the bring-up process for new hardware, and developing software fixes problems reported in the BIOS.

Candidates should have a BS in computer science or a related engineering discipline, at least 4 years of software development experience, and be able to program in C and assembly. Candidates should also have experience with Intel IA32/IA64 initialization, BIOS and HAL layers, and knowledge of system hardware architecture and hardware systems debugging techniques. In addition, experience with UNIX operating systems kernel internals or device drivers is desired.